The present invention relates generally to the packaging of integrated circuits. More particularly, the invention relates to leadless packaging designs and processes.
A leadless lead frame package (LLP) is an integrated circuit package design that contemplates the use of a lead frame in the formation of a chip scale package (CSP). The resulting packages are sometimes referred to as quad flat packs—no lead (QFN) packages. As illustrated in FIG. 1, in typical leadless lead frame packages, a copper lead frame strip or panel 101 is patterned (typically by stamping or etching) to define a plurality of arrays 103 of device areas 105. Each device area 105 includes a die attach pad 107 and a plurality of contacts 109 disposed about their associated die attach pad 107. Very fine tie bars 111 are often used to support the die attach pads 107 and contacts 109. The contacts 109 are generally attached to the tie bars 111 by tie bar stubs 112.
During assembly, dice are attached to the respective die attach pads 107 and conventional wire bonding is used to electrically couple bond pads on each die to their associated contacts 109 on the lead frame strip 101. After the wire bonding, a plastic cap is molded over the top surface of the array 103 of wire-bonded dice. The dice are generally then singulated and tested using conventional sawing and testing techniques.
FIGS. 2A and 2B illustrate a segment of a molded lead frame panel prior to singulation. The die attach pad 107 supports a die 120 which is electrically connected to its associated contacts 109 by bonding wires 122. A plastic casing 125 encapsulates the die 120 and bonding wires 122 and fills the gaps between the die attach pad 107 and the contacts 109, thereby serving to hold the contacts in place. Once the plastic casing 125 has cured, the bottom surfaces of the contacts 109 and the die attach pad 107 are buffed and solder-plated prior to singulation.
FIG. 2C illustrates a sawing-based singulation (or dicing) process. As shown therein, a saw blade 130 is directed along the tie bar axis, thereby severing the tie bar 111 (and removing corresponding portions of the molding material 125 and often a small portion of the tie bar stubs 112) as it proceeds. Once the tie bar 111 has been severed, only the molding material 125 holds the contacts 109 in place. The process is repeated along each tie bar in the two-dimensional matrix of tie bars, with a single pass being used to cut along each tie bar. When the dicing is complete, the resulting packaged chip can then be surface-mounted on a printed circuit board or other substrate using conventional techniques, such as soldering, as generally illustrated in FIG. 5A. As seen therein, compact solder joints 150 are typically formed between the package and the corresponding attach pads 151.
Since leadless lead frame packaging have proven to be a cost effective packaging arrangement, there are continuing efforts to provide further improvements to the package structure and/or processing to permit the package style to be used in additional applications and/or to improve specific characteristics of the resultant devices.